Change some comments
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				| @ -1,6 +1,9 @@ | ||||
| /*
 | ||||
| <<<<<<< HEAD | ||||
|  * geigerzaehler.c | ||||
|  * | ||||
| ======= | ||||
| >>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f | ||||
|  * Created			:	28.02.2019 09:07:22 | ||||
|  * Author			:	John Ditgens, Alexander Brandscheidt | ||||
|  * Git-Repository	:	https://gitea.Railduction.eu/JohnD/Geigerzaehler.git
 | ||||
| @ -14,6 +17,12 @@ | ||||
| #include <avr/io.h> | ||||
| #include <avr/interrupt.h> | ||||
| #include <stdint.h> | ||||
| <<<<<<< HEAD | ||||
| ======= | ||||
| 
 | ||||
| // Global variable declaration
 | ||||
| uint8_t  | ||||
| >>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f | ||||
| 
 | ||||
| 
 | ||||
| int main() | ||||
| @ -24,11 +33,21 @@ int main() | ||||
| 	PORTD |= (1<<2);					// Enable Pull Up Resistor Pin D2
 | ||||
| 	PORTD |= (1<<3);					// Enable Pull Up Resistor Pin D3
 | ||||
| 	 | ||||
| <<<<<<< HEAD | ||||
|     EICRA |= (1 << ISC11)|(1 << ISC10); // Only at raising edge
 | ||||
|     EIMSK |= (1 << INT1);				// Activate Interrupt INT0
 | ||||
|      | ||||
|     EICRA |= (1 << ISC00);				// Only at falling edge
 | ||||
|     EIMSK |= (1 << INT0);				// Activate Interrupt INT1
 | ||||
| ======= | ||||
| 	// Interrupt for INT0	Pin-D2	High-voltage check
 | ||||
|     EICRA |= (1 << ISC01)|(0 << ISC00); // Only at falling edge		[1|0]
 | ||||
|     EIMSK |= (1 << INT0);				// Activate Interrupt INT0
 | ||||
|      | ||||
| 	// Interrupt for INT1	Pin-D3	Counter-click
 | ||||
|     EICRA |= (1 << ISC11)|(1 << ISC10);	// Only at rising edge		[1|1]
 | ||||
|     EIMSK |= (1 <<INT1);				// Activate Interrupt INT1
 | ||||
| >>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f | ||||
| 	 | ||||
|     sei();		// Activate global interrupts
 | ||||
| 	 | ||||
| @ -38,14 +57,29 @@ int main() | ||||
|     } | ||||
| } | ||||
| 
 | ||||
| ISR(INT0_vect) 							 | ||||
| /*
 | ||||
|  * Interrupt-handler | ||||
|  * ISR - Interrupt service routine | ||||
|  */ | ||||
| // Address: 0x001	INT0
 | ||||
| ISR(INT0_vect) | ||||
| { | ||||
| <<<<<<< HEAD | ||||
| 	reti(); | ||||
| ======= | ||||
| 
 | ||||
| 	reti();		// Exit interrupt-handler
 | ||||
| >>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f | ||||
| } | ||||
| 
 | ||||
| 
 | ||||
| ISR(INT1_vect) | ||||
| { | ||||
| <<<<<<< HEAD | ||||
| 	reti(); | ||||
| ======= | ||||
| 	 | ||||
| 	reti();		// Exit interrupt-handler
 | ||||
| >>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f | ||||
| } | ||||
| 
 | ||||
| 1 | ||||
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