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@ -1,6 +1,9 @@
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/*
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/*
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<<<<<<< HEAD
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* geigerzaehler.c
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* geigerzaehler.c
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*
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*
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=======
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>>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f
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* Created : 28.02.2019 09:07:22
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* Created : 28.02.2019 09:07:22
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* Author : John Ditgens, Alexander Brandscheidt
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* Author : John Ditgens, Alexander Brandscheidt
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* Git-Repository : https://gitea.Railduction.eu/JohnD/Geigerzaehler.git
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* Git-Repository : https://gitea.Railduction.eu/JohnD/Geigerzaehler.git
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@ -14,6 +17,12 @@
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#include <avr/io.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/interrupt.h>
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#include <stdint.h>
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#include <stdint.h>
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<<<<<<< HEAD
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=======
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// Global variable declaration
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uint8_t
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>>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f
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int main()
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int main()
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@ -24,11 +33,21 @@ int main()
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PORTD |= (1<<2); // Enable Pull Up Resistor Pin D2
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PORTD |= (1<<2); // Enable Pull Up Resistor Pin D2
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PORTD |= (1<<3); // Enable Pull Up Resistor Pin D3
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PORTD |= (1<<3); // Enable Pull Up Resistor Pin D3
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<<<<<<< HEAD
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EICRA |= (1 << ISC11)|(1 << ISC10); // Only at raising edge
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EICRA |= (1 << ISC11)|(1 << ISC10); // Only at raising edge
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EIMSK |= (1 << INT1); // Activate Interrupt INT0
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EIMSK |= (1 << INT1); // Activate Interrupt INT0
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EICRA |= (1 << ISC00); // Only at falling edge
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EICRA |= (1 << ISC00); // Only at falling edge
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EIMSK |= (1 << INT0); // Activate Interrupt INT1
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EIMSK |= (1 << INT0); // Activate Interrupt INT1
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=======
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// Interrupt for INT0 Pin-D2 High-voltage check
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EICRA |= (1 << ISC01)|(0 << ISC00); // Only at falling edge [1|0]
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EIMSK |= (1 << INT0); // Activate Interrupt INT0
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// Interrupt for INT1 Pin-D3 Counter-click
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EICRA |= (1 << ISC11)|(1 << ISC10); // Only at rising edge [1|1]
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EIMSK |= (1 <<INT1); // Activate Interrupt INT1
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>>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f
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sei(); // Activate global interrupts
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sei(); // Activate global interrupts
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@ -38,14 +57,29 @@ int main()
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}
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}
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}
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}
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ISR(INT0_vect)
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/*
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* Interrupt-handler
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* ISR - Interrupt service routine
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*/
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// Address: 0x001 INT0
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ISR(INT0_vect)
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{
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{
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<<<<<<< HEAD
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reti();
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reti();
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=======
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reti(); // Exit interrupt-handler
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>>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f
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}
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}
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ISR(INT1_vect)
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ISR(INT1_vect)
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{
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{
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<<<<<<< HEAD
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reti();
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reti();
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=======
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reti(); // Exit interrupt-handler
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>>>>>>> f39ee6c90de22ce1514bb4f9e7e3e3116efac22f
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}
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}
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1
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